Floor planning/Power planning and Place and Route at block level and chip level Expert user of Synopsys ICC (or ICC2) Floor-planning, Place & Route and Clock Tree Synthesis In depth knowledge of CTS and customized clock implementations Integration
Employement Category:
Employement Type: Full timeIndustry: SemiconductorFunctional Area: ITRole Category: Subject Matter ExpertRole/Responsibilies: Physical Design - Staff Engineer / Principal Engineer