Platform Validation Engineering (PVE) within the Programmable Solutions Group (PSG) group is looking for a post silicon validation Engineer to be a part of our team during an unprecedented time of growth and technology development and enable Intels datacentric vision in building and scaling custom logic solutions spanning coherency and interconnects. In this role you will be responsible for validating entire solutions with board, silicon, SOC RTL, software, and firmware ingredients along with responsibilities that will include but are not limited to
- Post silicon hardware validation and debug of next generation FPGA and highspeed Transceiver tiles
- Design development verification and debug of Synthesizable FPGA IP designs for validation of various protocols and use cases
- Lead definition of validation strategies validation plans content development and drive execution and debug with cross functional teams
- Development of methodologies and capabilities that enable eiciency and eectiveness of post silicon test content including synthesizable FPGA designs and scripts
- Required to create, define, and develop system validation environment and test suites. Use and apply emulation and platform-level tools and techniques to ensure functionality and performance as per spec.
- Responsible in validating the functionality of new architectural features of next generation designs by developing test plans, tests content, coverage points or test tools.

Keyskills: C++ Automation ASIC FPGA SOC Perl PCIE Firmware Test cases Python
Our Client is a mid level web and mobile application development company located at Kovilambakkam.