PD Engineer
- ACL Digital
- 8 - 10 years
- Bengaluru
- 11 months ago
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Job Description
Responsibilities include but not limited to:
Own SoC level IR drop, Signal and power EM sign-off
Identify issues causing high EMIR, debug and optimal provide solutions.
Closely co-work with physical design team, to drive IREM closure and with system level teams to provide CPM models
PREFERRED EXPERIENCE:
More than 3 years of experience in PDN/EMIR closure in digital ASIC chips. Preferred 8+ years or more years of experience. Senior profiles preferred
Location: BLR
Prior AMD experience strongly preferred
Knowledgeable in physical design flow and impact of different aspects of designs causing IR EM issues
Expert in usage of Redhawk tools for static/Dynamic analysis using vectorless/vector approach and PG EM and Signal EM analysis,
Knowledgeable in all aspects of CMOS basics
Involved in Tape-in of multiple SoCs
Good listening, writing and speaking English
Job Classification
Industry: IT Services & ConsultingFunctional Area / Department: Engineering - Hardware & NetworksRole Category: HardwareRole: Product Design EngineerEmployement Type: Full timeContact Details:
Company: ACL DigitalLocation(s): Bengaluru+ View Contact
Keyskills: CPM ASIC Usage Product innovation SOC Consulting Debugging UPS Management Physical design
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