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ASIC Engineering Manager @ Meta

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 ASIC Engineering Manager

Job Description

Meta is seeking an Application-Specific Integrated Circuit (ASIC) Design Engineering Manager to lead our team in developing processing blocks for a System-on-Chip (SOC). As a key leader, you will drive Register-Transfer Level (RTL) design planning and execution, foster innovative methodologies, and manage IP design and SOC integration. You will collaborate closely with cross-functional teams, including Architecture, Software/Firmware, Verification, Modeling, Emulation, and Post-Silicon Validation, to shape silicon architecture and micro-architecture development.
ASIC Engineering Manager Responsibilities
  • Lead an ASIC design team, managing Register-Transfer Level (RTL) design planning and execution, innovative methodology development, u-Arch, IP design, and SOC integration
  • Collaborate with Architecture, Software/Firmware, Design, Modelling, Emulation, and Post-Silicon Validation teams to drive silicon architecture and interface development
  • Partner with cross-functional teams (executives, managers, individual contributors) to achieve corporate objectives
  • Contribute to and drive the overall silicon strategy aligned with the corporations Long Range Plan objectives
  • Collaborate with IP development teams to identify, select, and license soft and hard IP
  • Build, lead, and support a team of ASIC engineers through strategic hiring, training, and guidance to ensure on-time and on-budget product delivery
  • Analyze and audit statements of works (SOWs) from vendors, supporting documentation, and requirements sets to meet internal customer needs
  • Support engineering teams in defining, debugging, implementing, and delivering total solutions around purpose-built ASICs
  • Establish and maintain Key Performance Indicators (KPI) for areas of responsibility
  • Partner with technical program management and supply chain team members to manage external development partners, suppliers, and vendors
Minimum Qualifications
  • B.S. degree in Computer Engineering, Electrical Engineering, or a relevant technical field (or equivalent practical experience)
  • 8+ years of ASIC/SoC RTL design experience
  • 3+ years of People Management experience
  • In-depth understanding of RTL design tools, including Synopsys DC compiler, Cadence LEC, and Spyglass
  • Proven track record of first-pass success in ASIC Development
  • Experience managing multiple projects, prioritizing tasks, and collaborating with stakeholders
  • Prior experience with interpreting functional specs and create comprehensive u-Architectures
Preferred Qualifications
  • End to end SOC execution experience
  • Hands-on RTL coding experience
  • Post silicon support experience
  • Understanding of high speed protocols like Ethernet/PCIe/USB
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Job Classification

Industry: Internet
Functional Area / Department: Engineering - Hardware & Networks
Role Category: Hardware
Role: Hardware Engineering Manager
Employement Type: Full time

Contact Details:

Company: Meta
Location(s): Bengaluru

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Keyskills:   Supply chain ASIC USB SOC RTL coding Ethernet Debugging PCIE Firmware Auditing

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