Position: Senior DFT Engineer
Location: Bangalore / Hyderabad
Experience: 5+ Years
Email: ka**********u@pr******a.com
Job Description:
We are seeking an experienced Senior DFT Engineer with strong expertise in DFT design, verification, and test methodologies.
Key Responsibilities:
* Implement and verify DFT logic including MBIST, scan chains, compression, TAP, iJTAG, and eFuse.
* Perform scan insertion, scan compression, ATPG pattern generation, and coverage analysis.
* Execute MBIST insertion, simulation, and debug at RTL and gate levels.
* Collaborate with silicon and test engineering teams for test plan creation and pattern generation.
* Participate in post-silicon bring-up, diagnostics, and characterization.
* Work with EDA/IP vendors to adopt state-of-the-art DFT/DFD/DFY methodologies.
* Integrate DFT/BIST flows into synthesis and ensure timing closure across all stages.
* Utilize Verilog HDL, simulation, and waveform debugging tools effectively.
* Apply strong understanding of clock domain crossings and DFT impacts on synthesis/PD.
* Hands-on experience with Mentor DFT and Synopsys simulation tools is essential.

Keyskills: DFT Mbist DFT Engineer Dft Architecture SoC Boundary Scan Design for Test Scan Compression JTAG ASIC Scan Insertion Simulation Atpg Bist LBIST Senior DFT Test Pattern Generation
Proxelera is your premier outsourced product development partner (OPD), specializing in Semiconductors, Systems, and Bespoke Hardware. Proxelera combines process rigour with advanced technical expertise to deliver transformative solutions while fostering industry-academia collaboration and VLSI ta...